Wang, Yuan

Associate Professor

Research Interests: Integrated Circuit Reliability

Office Phone: 86-10-6276 7910

Email: wangyuan@pku.edu.cn

Wang, Yuan is an associate professor in the Department of Microelectronics, School of EECS, and has served as the Vice Dean of Department of Microelectronics since 2013. He obtained his B.E. and M.E. from Xidian University, and Ph.D. from Peking University in 2000, 2003 and 2006, respectively. His research interests include the design, testing and modeling of integrated circuit reliability for nano-scaled CMOS devices and circuits.

Dr. Wang has published more than 70 research papers in international journals and conferences, such as IEEE T-ED, EOS/ESD Symp., IEEE ISCAS. He has served in the Technical Program Committee of EOS/ESD Symp. Dr. Wang has more than ten research projects including NSFC, 973 programs, 863 project, etc. His research achievements are summarized as follows:

1)  High robustness ESD protection strategies for on-chip ICs: The continuous scaling-down tendency of semiconductor process renders on-chip ESD protection design more and more challenging. He focused on innovative ESD protection design for advanced devices and power-rail clamp circuits, and proposed high-robust solutions which had perfect ESD characteristics including ultra-low leakage, high area efficiency, high discharge ability, and false-triggering immunity. These solutions were transferred to the Chinese famous IC manufactory.

2)  System-level ESD co-design technique: The system-level ESD pulses can be much more powerful and more complicated than the component-level ESD pulses. There is scant information on how to efficiently implement system-level and component-level ESD protection together. He focused on system-efficient ESD design methodology, including modeling, simulation, testing. He proposed a complete SPICE-based on-/off- chip ESD device model, which can accurately simulate the performance of electric equipment under the system-level and component-level ESD stress.